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Document Type and Number:
Japanese Patent JP2715871
Kind Code:

PURPOSE: To encode image data at high speed by storing a bit pattern shifted in advance by attaching an output counter and a residual counter in variable length code storage memory as fixed length data.
CONSTITUTION: The image data are read from a file 24 first. The address of the variable length code storage memory 27 is calculated from the image data and the value of the residual counter, and the data are read in from a calculated address. The value of the output counter and that of the residual counter are saved to a register in a CPU 21, and a variable length code for the present data can be obtained. Thence, residual data are read in from copression data storage memory 26. The OR of the first byte of the present data is taken, and it is stored in the memory 26. Thence, data of of one byte can be updated by adding the value of the output counter on a variable representing the write address of the memory 26.

田中 信行
Application Number:
Publication Date:
February 18, 1998
Filing Date:
December 20, 1993
Export Citation:
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International Classes:
G06T9/00; H03M7/40; H03M7/42; H04N1/41; H04N19/423; H04N19/60; H04N19/91; (IPC1-7): H03M7/40; G06T9/00; H04N1/41; H04N7/30
Domestic Patent References:
Attorney, Agent or Firm:
京本 直樹 (外2名)