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Patent Searching and Data


Title:
VERIFICATION DEVICE FOR LOG ANALYTIC PROGRAM
Document Type and Number:
Japanese Patent JPH07253913
Kind Code:
A
Abstract:

PURPOSE: To prevent the omission of extraction of a logical miss as to the verification device for the log analytic program.

CONSTITUTION: This device is equipped with pseudo log data 7, an interruption control part 1 which holds address settings for generating an interruption with a comparison instruction (1) used for a log analysis, a comparison result, a debugging mode selecting mechanism which causes the interruption when the comparison instruction (1) refers to an address area set in the interruption control part 1, a declaration table 3 wherein the format of the address area set in the interruption control part 1 is defined, and an interruption processing part 4 which takes the contents and definition name of an object address out when the interruption is generated with the comparison instruction (1). In debugging mode, the log analytic program is executed to read in the pseudo log data, and data to be compared at the time of the execution of the comparison instruction (1) which are generated halfway in the analysis and its definition name and comparison result (matching or unmatching) are outputted to an external storage device 5, when the output results are deficient, the deficient part is compensated.


Inventors:
SHIMADA KENICHI
Application Number:
JP4457594A
Publication Date:
October 03, 1995
Filing Date:
March 16, 1994
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/34; (IPC1-7): G06F11/34
Attorney, Agent or Firm:
Teiichi