To facilitate the test data preparing operation of logical verification in logical verification operation at the logical designing step of a printed circuit and LSI.
A time chart input part 300 fetches the time chart of plural signal waveforms and a waveform data processing part 410 stores element data such as time specifying data and a condition specifying data, which are obtained by element-analyzing data including a condition showing the changing point of each signal waveform and timing condition, in a waveform data table 420 by the kind of operation data. On the other hand, a description data master format is fetched by the kind of operation data from an operation for logical verification describing data grammar specification 800, and an operation description data preparing part 440 automatically generates operation description data in accordance with a master format based on each element data.
SAKAKIBARA SATORU
WATANABE TAKEHISA
KAWAMURA TOSHIAKI
ISHIBASHI YASUO
HITACHI PROCESS COMPUTER ENG