PURPOSE: To reduce the cost by miniaturization in circuit mount and reduction of number of components by adopting a configuration suitable for circuit integration for a slicer and a limiter circuit to process a vertical difference signal for vertical contour emphasis.
CONSTITUTION: The circuit is provided with a subtractor means delaying a video signal by one horizontal scanning period and subtracting the 1H delay video signal from the video signal to obtain a difference signal, a slicer and limiter means 4a slicing and limiting the difference signal and outputting a slice and limiter signal, and an adder means adding the slice and limiter signal and the video signal. Then the slicer and limiter means 4a is provided with a 1st limiter means 26 limiting the difference signal to a 1st level, a 2nd limiter means 20 limiting the difference signal to a 2nd level, and an arithmetic operation means subtracting an output of the 2nd limiter means 20 from the signal in response to the output of the 1st limiter means 26 and outputting the slice and limiter signal.
JP4428347 | Image data output Image adjustment |
TOSHIBA AVE KK