Title:
縦型接合電界効果半導体ダイオード
Document Type and Number:
Japanese Patent JP2004517473
Kind Code:
A
Abstract:
Methods and apparatus of forming a semiconductor device using pedestals and sidewalls. The pedestals and sidewalls may provide an etch stop and/or a diffusion barrier during manufacture of a semiconductor device. Processes of forming diode connected vertical cylindrical field effect devices are disclosed to exemplify the use of the pedestals and/or sidewalls. A system for forming the pedestals and sidewalls is described.
Inventors:
Metzler, Richard A.
Application Number:
JP2002550321A
Publication Date:
June 10, 2004
Filing Date:
October 18, 2001
Export Citation:
Assignee:
Vrum Technologies L'Elsii
International Classes:
H01L21/308; H01L21/329; H01L21/337; H01L21/8234; H01L29/861; H01L27/02; H01L29/808; (IPC1-7): H01L29/861; H01L21/329; H01L21/337; H01L29/808
Attorney, Agent or Firm:
Masaki Yamakawa