Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
VERTICAL MAGNETIC RECORDING CIRCUIT
Document Type and Number:
Japanese Patent JP01134706
Kind Code:
A
Abstract:

PURPOSE: To suppress a noise generation in a part in which a pulse interval is long by inserting dummy data composed of pulses with short periods compulsorily into the part in which the pulse interval of write data is long.

CONSTITUTION: When a signal to be made into an 'H' level at the time when the pulse interval of write data SA is, for example, 150ns or above, namely, at the time when both a signal SC and a signal SD are at an 'L' level is supplied to an AND gate 26, the AND gate 26 is opened in the section of the 'H' level, and a clock CK 25 is outputted as dummy data SG. It is a signal corresponding to a dummy magnetization inverting part, a logical sum with a normal signal SF is obtained by an OR gate 27, it is outputted as a signal SH, and it is written onto a magnetic disk. In such a way, by forming the dummy magnetization inverting part on a magnetic medium, the noise in the closed magnetic path section can be suppressed.


Inventors:
Kawabata, Tomoyuki
Application Number:
JP1987000293445
Publication Date:
May 26, 1989
Filing Date:
November 20, 1987
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
YAMAHA CORP
International Classes:
G11B5/09; G11B5/09; (IPC1-7): G11B5/09



 
Previous Patent: DATA READING CIRCUIT

Next Patent: JPH01134707