PURPOSE: To attain high reliability of a device as well as a reduction of number of manufacturing processes with miniaturization of the device structure and a cost reduction, by stabilizing the working of circuits including a VCO, etc. and facilitating easy conversion into a semiconductor IC as a component part of a circuit with addition of the 2nd PLL circuit.

CONSTITUTION: The 2nd PLL circuit is locked at an output signal frequency of a frequency dividing circuit 112. The circuit 112 divides the output signal of a crystal oscillating circuit 102 and delivers a signal of a free-run frequency which is needed for the 1st VCO109. Naturally the phase difference is fixed between two signals supplied to a phase comparator 114 while the 2nd PLL is locked, and the frequencies are equal to each other between these two signals. The output of the 3rd PLF is controlled so that the 2nd VCO118 is always oscillated with the free-run frequency by the function of a negative feedback loop although the VCO constant has a variance due to a variance of constant of a VCO component element or owing to the power supply voltage, the ambient temperature, the change in the lapse of time, etc. In such a way, the VCO109 within a PLL can be stabilized.