Title:
VIDEO SCANNING CONVERTER
Document Type and Number:
Japanese Patent JPH0250596
Kind Code:
A
Abstract:
PURPOSE:To obtain a high definition reproduced picture by using a clock generated by means of a phase-locked PLL to a vertical synchronizing signal as the read clock separately from the write clock to a memory. CONSTITUTION:A means to control reading from memories 4 to 6 of a digital TV video signal, a D/A converter 17 to convert the digital TV video signal read from the memory to the analog TV video signal, and first and second phase synchronizing loops (PLL) are provided. The clock generated by means of the PLL phase-locked to the vertical synchronizing signal or by means of the PLL phase-locked to a reference signal obtained by dividing and counting a horizontal synchronizing signal is used as the read clock from the memory separately from the write clock to the memory. Thus, the effect of jitters included in a final read signal from the memory can be decreased and absorbed, and the high-definition reproduced picture can be obtained.
Inventors:
TACHIKI SHINICHI
Application Number:
JP20157088A
Publication Date:
February 20, 1990
Filing Date:
August 11, 1988
Export Citation:
Assignee:
SHARP KK
International Classes:
H04N13/00; (IPC1-7): H04N13/00
Attorney, Agent or Firm:
Fukami Hisaro (2 outside)
Next Patent: JPH0250597