PURPOSE: To obtain a video signal A/D conversion circuit generating a digital video signal with high quality by always making a maximum value of a video signal fed to the A/D converter coincident with an upper limit level of sampling in the A/D converter.
CONSTITUTION: A clamp circuit 2 clamps a black level of a video signal 101 to a lower reference potential VB at the sampling of an A/D converter 10. A comparator 3 compares an upper limit potential VT at the sampling of an A/D converter 10 with a video signal 102 and generates a logic signal 103 at 'H' when the video signal 102 exceeds the level VT. D flip-flop circuits 5, 6 latch the state of the signal 103 only for a period of vertical synchronizing signal VD. An up-down counter 7 counts down when a signal 106 is at H and counts up when L. A D/A converter 8 converts a digital count signal 107 into an analog signal 108. An amplifier offset adjustment circuit 9 amplifies the signal 108 and adjusts the center potential of fluctuation (offset potential) and generates a gain control signal 109 in matching with the standard of the amplitude and the offset potential of the video amplifier 1.
ONO SHIGEO
JPS63244934A | 1988-10-12 | |||
JPH01273425A | 1989-11-01 | |||
JPH0236231B2 | 1990-08-16 |
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