To provide a voltage boosting/step-down circuit for miniaturizing an apparatus by simplifying the circuit constitution.
The voltage boosting/step-down circuit is provided with a voltage dropping section 22 for receiving a system clock pulse, alternately repeated between a reference voltage (GND) and a system voltage VDD, utilizing the potential difference between the reference voltage (GND) and the system voltage VDD, and outputting a voltage V4 lower than the reference voltage (GND); a level shifter 24 for receiving the system clock pulse and the voltage V4 outputted from the voltage dropping section 22, and outputting a pulse signal VO, having a potential difference larger than the potential difference between the reference voltage (GND) and the system voltage VDD; and a voltage booster 26 for receiving the pulse signal VO, outputted from the level shifting section 24, and outputting a voltage V7 higher than the reference voltage (GND). Such a circuit will make the circuit small sized.
Jun Ishida