Title:
VOLTAGE MULTIPLIER, VOLTAGE BOOSTER AND VOLTAGE REGULATOR
Document Type and Number:
Japanese Patent JP3242295
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain two ways of use for enabling finding out the advantageous use of a charge pump MOS voltage booster and boosters of this type.
SOLUTION: A voltage booster is equipped with four MOS transistors (M1, M2, M3, M4) in place of a classical diode showing an undesirable voltage drop and with an oscillator having two output terminals and two corresponding charge transfer capacitors, in place of a classical oscillator of a single output having relevant charge transfer capacitors. In this method, the undesirable voltage drop substantially does not exist, and ripples are reduced without making a circuit complicated.
Inventors:
Francesco Purvirenti
Roberto Garibordi
Roberto Garibordi
Application Number:
JP20714595A
Publication Date:
December 25, 2001
Filing Date:
August 14, 1995
Export Citation:
Assignee:
CO.RI.M.ME.-CONSORZIO PER LA RICERCA SULLA MICROELETTRONICA NEL MEZZOGIORNO
SGS-THOMSON MICROELECTRO NICS S.R.L.
SGS-THOMSON MICROELECTRO NICS S.R.L.
International Classes:
H02M3/07; (IPC1-7): H02M3/07
Domestic Patent References:
| JP5219721A | ||||
| JP6343260A |
Attorney, Agent or Firm:
Soga Doteru (6 people outside)