To fixedly hold a limit value of a current from a secondary side regardless of a level of primary side voltage by limiting a primary side current of a transformer so as to prevent it from exceeding a prescribed upper limit value, also changing the upper limit value of the primary side current in a manner such that it is almost inversely proportional to the primary side input voltage.

A primary side current Io carried in a power MOS transistor Qm by a current detection circuit 41 of an over-current protection circuit 4 is converted into a voltage by a shunt resistor Rs, to be detected, also a comparison reference voltage Vx is variably generated by a variable voltage generating circuit 51. Whether the counted voltage exceeds the generated comparison reference voltage or not is detected by current conversion detection voltage Vcs from a voltage comparison circuit 42, this detected output is inputted to an output limiting circuit 43, the power MOS transistor Qm is forcedly limited and is set to off. The comparison reference voltage Vx is changed in a manner wherein an upper limit value of a primary side current Io of a transformer is almost inversely proportional to a primary side input voltage VB thereof.