To consolidate a process which requires a facility similar to the one used for the former process into a component in off-line.
By forming a plurality of LSI chips having an LSI region and a plurality of bonding pad regions on a semiconductor substrate on a wafer, an LSI wafer is completed. A plurality of post electrodes collectively connected to the plurality of bonding pad regions, interconnections respectively connected to the plurality of post electrodes, and a post electrode component with interconnections having a support for integrally supporting the plurality of post electrodes and the interconnections from a back side are formed. After collectively connecting the plurality of bonding pad regions and the plurality of post electrodes, resin sealing is performed. The interconnections are exposed by making a hole in the support, or peeling off from the support, external terminals connected to this exposed interconnection are formed. The plurality of interconnections is formed in the surface of the resin sealing portion.
UEDA HIROTAKA
HASHIMOTO KENJI
NAKAYA MICRODEVICES CORP