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Patent Searching and Data


Title:
WAFER PROBER
Document Type and Number:
Japanese Patent JP2004104151
Kind Code:
A
Abstract:

To provide a wafer prober which has excellent controllability without warp even when a probe card is pressed without release in a boundary of a junction due to attaching/detaching of a socket, etc., since an external terminal pin is tightly fixed, which prevents a wafer from being damaged or measured by mistake, and which has excellent temperature rise/fall characteristics.

The wafer prober in which a chuck top conductor layer is formed on a surface of a ceramic substrate and a guard electrode and/or a ground electrode is formed in the substrate. In the prober, one or both of the guard electrode and the ground electrode is electrically connected. The prober includes a through hole for electrically connecting to an external terminal, and a bag hole for exposing the hole.


Inventors:
ITO ATSUSHI
HIRAMATSU YASUJI
ITO YASUTAKA
Application Number:
JP2003407991A
Publication Date:
April 02, 2004
Filing Date:
December 05, 2003
Export Citation:
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Assignee:
IBIDEN CO LTD
International Classes:
H01L21/66; (IPC1-7): H01L21/66
Attorney, Agent or Firm:
Yasuo Yasutomi
Kazunobu Shigehira