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Title:
WAFER PROCESSING METHOD
Document Type and Number:
Japanese Patent JP2018081950
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To suppress the movement of chips to avoid worsening the chip quality during a grinding work in a method arranged so that each groove is exposed by grinding to divide a wafer into chips.SOLUTION: A wafer processing method comprises: a step of covering, with a resist film R, an outer peripheral region Wa2 surrounding a device region Wa1 in a surface Wa of a wafer W, and a region Wa3 except scheduled division lines S in the device region Wa1; a plasma etching step of forming a groove M of a depth reaching a finishing thickness of the wafer W along each scheduled division line S in the device region Wa1 of the wafer surface Wa subjected to the resist film-covering step; a step of removing the resist film R on the wafer surface Wa after execution of the plasma etching step; a step of disposing a protective member T on the wafer surface Wa with the groove M formed therein; and a grinding step of thinning the wafer by grinding a backside Wb of the wafer to the finishing thickness, thereby exposing the groove M from the backside Wb of the wafer and dividing the wafer W into chips C.SELECTED DRAWING: Figure 10

Inventors:
MOTOKI TOMOKO
Application Number:
JP2016221370A
Publication Date:
May 24, 2018
Filing Date:
November 14, 2016
Export Citation:
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Assignee:
DISCO ABRASIVE SYSTEMS LTD
International Classes:
H01L21/301; H01L21/304; H01L21/3065; H05H1/46
Domestic Patent References:
JP2002025948A2002-01-25
JP2008091779A2008-04-17
JP2006344816A2006-12-21
JP2005101290A2005-04-14
Attorney, Agent or Firm:
Patent Business Corporation Tokyo Alpa Patent Office