Title:
WAFER AND PROCESSING METHOD FOR WAFER
Document Type and Number:
Japanese Patent JP2023173553
Kind Code:
A
Abstract:
To suppress a semiconductor chip from chipping.SOLUTION: A wafer 20 is subjected to an expand process after having a modified region formed along lines 15 to have a plurality of semiconductor chips 120, and has a plurality of chip-formation regions 200 sectioned with chip section lines 151 as the lines 15, wherein a chip-formation region 200 has a chip part 120x which constitutes a semiconductor chip 120 and a cut-off part 122 which is cut off from the chip part 120x and also connects with the chip part 120x through an opening line 152 as the line 15 so set as to form an opening part 121 in a cut-off shape in the semiconductor chip 120, and the opening line 152 is so set that the width of the opening part 121 increases toward an opening end side, or is constant.SELECTED DRAWING: Figure 16
Inventors:
SAKAMOTO TSUYOSHI
NAKURA KEISUKE
YAMAMOTO KAZUMA
NAKURA KEISUKE
YAMAMOTO KAZUMA
Application Number:
JP2022085883A
Publication Date:
December 07, 2023
Filing Date:
May 26, 2022
Export Citation:
Assignee:
HAMAMATSU PHOTONICS KK
International Classes:
H01L21/301
Attorney, Agent or Firm:
Yoshiki Hasegawa
Yoshiki Kuroki
Kenichi Shibayama
Yasushi Naito
Yoshiki Kuroki
Kenichi Shibayama
Yasushi Naito
Previous Patent: Medical image diagnostic equipment, X-ray diagnostic equipment, and medical image generation equipme...
Next Patent: patch protector
Next Patent: patch protector