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Patent Searching and Data


Title:
WAVEFORM MEMORY UNIT
Document Type and Number:
Japanese Patent JPS5460543
Kind Code:
A
Abstract:

PURPOSE: To ensure easy analysis for the factor of the fault by securing the automatic switching at the fault detecting time for the period of the clock signal to be used for memorization of the waveforms of the output voltage and the like and reproducing the waveform before and after the fault detecting time through the time compression.

CONSTITUTION: The output voltage of DC power source 1 is supplied to load 2 and also undergoes A/D conversion 3 to be memorized in memory 4. At the same time, clock generator circuit 5 and 11 of different oscillation periods are provided, and multiplexer 12 supplies the clock of one period T1 to counter 6 via gate 10. So that the writing into memory 4 is carried out with period T1 as well. However, if some fault occurs to the waveform of output voltge Vout, circuit 12 delivers the other period T2 via comparator 7. Thus, the writing into memory 4 is carried out with period T2 (T1T2) as well. As a result, the waveform of the output voltage perceding the fault detecting time is reproduced under the compressed state


Inventors:
YAMADA TOMOHISA
Application Number:
JP12685877A
Publication Date:
May 16, 1979
Filing Date:
October 24, 1977
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G11C27/00; G01R13/20; G06F1/26; G06J1/00; (IPC1-7): G06J1/00; G11C27/00