Title:
WAVEFORM OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JP3062678
Kind Code:
B2
Abstract:
PURPOSE: To reduce the cost by adding 1st and 2nd D/A converter means converting waveform data to a mode selection means so as to obtain a class B push-pull output and a class A output with a simple circuit.
CONSTITUTION: The waveform output circuit has a mode selection means SEL, a waveform data generating means WDG, a 1st D/A converter means DAC1, and a 2nd D/A converter means DAC2. In the 1st mode of the selection means SEL, waveform data of a polarity are D/A-converted and waveform data of both polarity are D/A-converted in the 2nd mode by the D/A converter DAC1. Furthermore, in the 1st mode, the waveform data of the other polarity are D/A-converted by the D/A converter means DAC2. The plural waveform output circuits of the configuration as above are connected and the connection of outputs of the circuits is facilitated.
Inventors:
Miyuki Imamura
Application Number:
JP11431995A
Publication Date:
July 12, 2000
Filing Date:
May 12, 1995
Export Citation:
Assignee:
Seiko Clock Co., Ltd.
International Classes:
H03M1/66; H03M1/74; (IPC1-7): H03M1/66; H03M1/74
Domestic Patent References:
| JP6156518A | ||||
| JP66229A | ||||
| JP295940U |
Attorney, Agent or Firm:
Kazuko Matsuda