WAVEGUIDE INPUT/OUTPUT PACKAGE AND ITS SEMICONDUCTOR CIRCUIT CHIP

Title:

WAVEGUIDE INPUT/OUTPUT PACKAGE AND ITS SEMICONDUCTOR CIRCUIT CHIP

Document Type and Number:

Japanese Patent JP3308338

Kind Code:

B2

Abstract:

PURPOSE: To eliminate the need for a bonding wire or a ribbon or the like by covering a couple of waveguide forming sections onto a strip line on a semiconductor circuit chip exposed vertically from an opening of a chip mount section and mounting the covered line to an upper and a lower side of the chip mount section.
CONSTITUTION: A couple of waveguide forming sections 1 having a short-circuit face 2 and an input/output port 3 and forming a waveguide 1C in its inside are covered onto a strip line 7 on a chip 6 exposed vertically from an opening section 5 of a chip mount section 4 and the covered line is mounted respectively to upper and lower sides 4a, 4b of the chip mount section 4. Thus, the conversion from the strip line 7 into the waveguide 1C on the chip 6 is executed in the inside of the package and the waveguide input/output package not requiring the connection by a bonding wire or a ribbon or the like is obtained. Then the characteristic of a planer line-waveguide conversion section depends on the length of the strip line 7 probing the waveguide 1C and the distance between the probe and the short-circuit face 2 of the waveguide 1C.

Inventors:

Shin Chaki

Application Number:

JP10208293A

Publication Date:

July 29, 2002

Filing Date:

April 28, 1993

Export Citation:

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