Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
WEIGHTED ADDITION CIRCUIT
Document Type and Number:
Japanese Patent JPH0944582
Kind Code:
A
Abstract:

To actualize a sample holding function and a weighted addition function with a circuit which is smaller in scale than before by connecting a capacitive coupling to plural switches which are connected to only an input voltage and both holding and weighting the voltage by this capacitive coupling.

Capacitances C1-C8 are connected to the outputs of the switches SW1-SW8 connected to the input voltage Vin, and when a switch is closed, the capacitance corresponding to the switch holds electric charges corresponding to the voltage Vin. The outputs of the capacitors C1-C8 are integrated to constitute the capacitive coupling CP1, whose output is connected to an inverting amplification part INV1 consisting of MOS inverters 11-13 in an even number of stages. The output of the inverting amplification part INV1 is connected to its input through a feedback capacitance CF1 and the output of the capacitive coupling CP1 is generated as an output voltage Vol at the output of the inverting amplification part INV1 while having excellent linear characteristics.


Inventors:
KOTOBUKI KOKURIYOU
SHU NAGAAKI
MOTOHASHI KAZUNORI
YAMAMOTO MAKOTO
TAKATORI SUNAO
Application Number:
JP21242095A
Publication Date:
February 14, 1997
Filing Date:
July 28, 1995
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SHARP KK
YOZAN KK
International Classes:
G06G7/14; G06J1/00; (IPC1-7): G06G7/14
Attorney, Agent or Firm:
Yamamoto Makoto



 
Next Patent: DIVIDING CIRCUIT