Title:
WIRED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2023183356
Kind Code:
A
Abstract:
To provide a wired circuit board and a manufacturing method thereof capable of reducing electrical resistance between a conductor pattern and a metal layer under a first metal thin film while protecting the metal layer under the first metal thin film.SOLUTION: A wired circuit board 1 includes a metal support layer 11, a first metal thin film 12, an insulating layer 13 having a through hole 131, a second metal thin film 14 disposed on the first metal thin film 12 in the through hole 131, and a conductor pattern 15 that is electrically connected to the metal support layer 11 through the first metal thin film 12 and the second metal thin film 14 in the through hole 131. The first metal thin film 12 has an oxide film 121 at least on a contact surface S1 with the insulating layer 13. At the center of the through hole 131, thickness T1 of the oxide film 121 is set to 0 or is made thinner than thickness T2 of the oxide film 121 on the contact surface S1.SELECTED DRAWING: Figure 2
Inventors:
IKEDA TAKAHIRO
YAMADA KYOTARO
ISHIKAWA TAKETO
KUWAYAMA HIROKI
TAKEDA YUKI
YAMADA KYOTARO
ISHIKAWA TAKETO
KUWAYAMA HIROKI
TAKEDA YUKI
Application Number:
JP2022168719A
Publication Date:
December 27, 2023
Filing Date:
October 20, 2022
Export Citation:
Assignee:
NITTO DENKO CORP
International Classes:
H05K1/02; H05K1/09; H05K1/11; H05K3/18; H05K3/40
Attorney, Agent or Firm:
Hiroyuki Okamoto
Shinichi Uda
Shinichi Uda