WIRED-OR TYPE PAGE BUFFER HAVING CACHE FUNCTION, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE COMPRISING THE SAME AND ITS DRIVING METHOD

Title:

WIRED-OR TYPE PAGE BUFFER HAVING CACHE FUNCTION, NONVOLATILE SEMICONDUCTOR MEMORY DEVICE COMPRISING THE SAME AND ITS DRIVING METHOD

Document Type and Number:

Japanese Patent JP2006196153

Kind Code:

A

Abstract:

To provide a page buffer wherein verification and reading of a program can be performed by a wired-OR system and which has a cache function, to provide a nonvolatile semiconductor memory device comprising the same and to provide its driving method.

A cache latching block having a cache function is incorporated in the page buffer. Since data loading time for page data other than the first page data is hardly needed when program runs by the cache latching block, total time necessary for a program is greatly shortened. Since the page buffer includes an output driver driving an internal output line in one direction, program verification and reading can be performed by the wired-OR system. Thereby, time needed for program verification and reading is reduced.

Inventors:

LEE SUNG SOO
KIM MIN SOO
LEE SEUNG-JAE

Application Number:

JP2006000816A

Publication Date:

July 27, 2006

Filing Date:

January 05, 2006

Export Citation:

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Assignee:

SAMSUNG ELECTRONICS CO LTD

International Classes:

G11C16/02; G11C16/06

Domestic Patent References:

JP2004192780A	2004-07-08
JP2002140899A	2002-05-17

Attorney, Agent or Firm:

Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro

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