Title:
WIRING BOARD, PACKAGE FOR ACCOMMODATING SEMICONDUCTOR ELEMENT AND ITS MOUNTING STRUCTURE
Document Type and Number:
Japanese Patent JP3323074
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor element housing package and the mounting structure thereof which can maintain rigid and stable connection for a long period of time the package for housing, for an external electric circuit using glass-epoxy resin as an insulator, a wiring board providing a metal wiring layer at the surface or inside of the insulating board having a high thermal expansion characteristic and a semiconductor element having a high thermal expansion characteristic and housing semiconductor element.
SOLUTION: In a wiring board providing a metal wiring layer 3 of Ag at the surface or inside of an insulating board 1 or a package A for housing semiconductor element, the insulting board 1 is formed by a sintered body having the thermal expansion coefficient at 40 to 400°C of 8 to 18ppm/°C obtained by sintering a mold body including the glass powder of 20 to 80 volume % including BaO of 10wt.% or more and the filler of 80 to 20 volume % including metal oxide of the thermal expansion coefficient of 6ppm at 40 to 400°C. This insulating board 1 is then mounted, via the connecting terminal 4, by the soldering junction on the external electric circuit board B where the wiring conductor 8 is deposited on the surface of insulator including at least an organic resin.
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Inventors:
Koichi Yamaguchi
Yoji Kokubo
Masahiko Higashi
Hideto Yonekura
Noriaki Hamada
Yoji Kokubo
Masahiko Higashi
Hideto Yonekura
Noriaki Hamada
Application Number:
JP22701496A
Publication Date:
September 09, 2002
Filing Date:
August 28, 1996
Export Citation:
Assignee:
Kyocera Corporation
International Classes:
C04B35/16; C03C10/00; H01L23/12; H01L23/13; H01L23/15; H05K1/03; (IPC1-7): H01L23/15; H01L23/12
Domestic Patent References:
| JP4238837A | ||||
| JP63215559A |