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Title:
WIRING BOARD
Document Type and Number:
Japanese Patent JP2001102701
Kind Code:
A
Abstract:

To reduce thermal expansion or improve the thermal conductivity of a surface wiring circuit layer, which is formed on the surface of a wiring board and to which to large current is supplied, without impairing the electrical resistance and thermal conductivity of the low-resistance conductor component of the circuit layer.

In a wiring board A provided with a ceramic insulating substrate 1 made of Al2O3, AlN, Si3N4, etc., and wiring circuit layers 2 and 3 formed on the surface of the substrate 1, particularly the wiring circuit layer 2, to which a current of 10 A or larger is supplied is formed of a composite material incorporating a 15- to 150-mesh netted material 8 of a low-resistance conductor made of at least one kind of metal selected from among Cu and Al and containing Mo, W, Cu, Ag, martensitic stainless steel, carbon, etc., having a lower coefficient of thermal expansion than the conductor component has or higher thermal conductivity than that of the conductor. In addition, such electronic components as semiconductor element, etc., are jointed to the surface of the wiring circuit layer 2 formed of the composite material with a brazing material.


Inventors:
Sasaki, Yasuhiro
Nakagawa, Shoichi
Application Number:
JP1999000275057
Publication Date:
April 13, 2001
Filing Date:
September 28, 1999
Export Citation:
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Assignee:
KYOCERA CORP
International Classes:
H05K1/03; H05K1/09; H05K3/38; (IPC1-7): H05K1/09; H05K3/38