Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
WIRING DELAY TIME CALCULATION SYSTEM
Document Type and Number:
Japanese Patent JPH0512379
Kind Code:
A
Abstract:

PURPOSE: To calculate a delay time on which mount information is reflected speedily and accurately.

CONSTITUTION: A network storage means 1 is stored with network information on a circuit. A floor plan storage means 2 is stored with the floor plan of the circuit as position information on components of the circuit. A wiring length calculating means 3 finds the expected wiring length of the network from the information on the floor plan and network. A wiring length storage means 4 is stored with the expected wiring length. A wiring delay time calculating means 5 calculates the wiring delay time from the expected wiring length. A wiring delay time storage means 6 is stored with the calculated wiring delay time.


Inventors:
HASEGAWA TAKUMI
Application Number:
JP16606591A
Publication Date:
January 22, 1993
Filing Date:
July 08, 1991
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NEC CORP
International Classes:
H01L21/82; G06F17/50; H05K3/00; (IPC1-7): G06F15/60; H01L21/82; H05K3/00
Attorney, Agent or Firm:
Uchihara Shin