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Title:
WIRING FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE THEREWITH, AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH11135502
Kind Code:
A
Abstract:

To provide wiring for semiconductor devices, which is improved in filling of through holes by comprising the wiring with a metal or an alloy of metals and by adopting a layer structure having more than two layers, and to provide a semicon ductor device therewith, and a method of manufacture thereof.

A through-hole 14 is formed by patterning. In a subsequent process, a layer 22 of aluminum or an aluminum alloy is formed after forming the film on the entire surface of a substrate 1 or after forming the film on the entire surface and patterning. The structure of the layer 22 of aluminum or an aluminum alloy is made to a multilayer structure; for example, by forming layers of Ti, TiN, Tin+Ti TiN+Ti+low-temperature Al, or the like, before forming the layer 22 of aluminum or an aluminum alloy. Then, after the entire surface of the substrate 1 is heat-treated, surface of the pixel electrode is polished. By the structure and processes above stated, thermal reaction with the layer underneath the layer 22 of aluminum or an aluminum alloy is suppressed, enabling a raise in process temperature, a suppression failures originated by unevenness of the surface geometry, and an improvement in filling of the through-hole 14.


Inventors:
YAMAGISHI KOICHI
KUREMATSU KATSUMI
KOYAMA OSAMU
Application Number:
JP29446297A
Publication Date:
May 21, 1999
Filing Date:
October 27, 1997
Export Citation:
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Assignee:
CANON KK
International Classes:
G02F1/136; G02F1/1368; G09F9/30; H01L21/28; H01L21/3205; H01L23/52; (IPC1-7): H01L21/3205; G02F1/136; G09F9/30; H01L21/28
Attorney, Agent or Firm:
Yamashita