Title:
WIRING STRUCTURE FOR SEMICONDUCTOR DEVICE AND TRANSISTOR ARRAY FOR DISPLAY ELEMENT
Document Type and Number:
Japanese Patent JPH088256
Kind Code:
A
Abstract:
PURPOSE: To provide a wiring structure for semiconductor devices wherein resistance is low and there is no delay in signal propagation, and transistor array for display elements having such a wiring structure.
CONSTITUTION: A wiring structure for semiconductor devices consists of a wiring pattern 2 formed on the surface of a substrate 1, and an insulating layer 3 formed on the substrate 1 in such a way that it covers the wiring pattern 2. The trace pattern 2 is composed of a material containing at least aluminum as a major component and is so formed that its thickness will be 100nm or less.
Inventors:
IKEDA HIROYUKI
Application Number:
JP16464994A
Publication Date:
January 12, 1996
Filing Date:
June 22, 1994
Export Citation:
Assignee:
SONY CORP
International Classes:
G02F1/136; G02F1/1368; H01L21/28; H01L21/3205; H01L23/52; H01L29/78; H01L29/786; (IPC1-7): H01L21/3205; G02F1/136; H01L21/28; H01L29/786
Domestic Patent References:
| JPH04147113A | 1992-05-20 | |||
| JPH0562899A | 1993-03-12 | |||
| JPH05323374A | 1993-12-07 | |||
| JPH03129326A | 1991-06-03 | |||
| JPH02156226A | 1990-06-15 | |||
| JPH05216070A | 1993-08-27 | |||
| JPH01134426A | 1989-05-26 |
Attorney, Agent or Firm:
Kuninori Funabashi
Next Patent: 常圧ＣＶＤ装置