Title:
WIRING STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3672941
Kind Code:
B2
Abstract:
PURPOSE: To provide the wiring structure of a semiconductor integrated circuit which has a low resistance and high electromigration resistance and can prevent the diffusion of the atom of a wiring material into an insulating film and substrate and its manufacturing method.
CONSTITUTION: An insulating film 12 is formed on a silicon substrate 10 and a tungsten film 14 is formed on the film 12. Then, after forming an amorphous W-N film 16 by irradiating the surface of the film 14 with plasma, Co wiring 20 is formed on the film 16.
Inventors:
Tadashi Nakano
Hideaki Ono
Hideaki Ono
Application Number:
JP5413794A
Publication Date:
July 20, 2005
Filing Date:
March 24, 1994
Export Citation:
Assignee:
Kawasaki Microelectronics, Inc.
International Classes:
H01L21/203; H01L21/3205; H01L23/52; (IPC1-7): H01L21/3205
Domestic Patent References:
| JP64005015A | ||||
| JP63156341A | ||||
| JP4267359A | ||||
| JP3245533A | ||||
| JP3132022A | ||||
| JP2051273A |
Attorney, Agent or Firm:
Yoshio Kosugi
Masaki Yamada
Masaki Yamada