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Patent Searching and Data


Title:
WIRING SUBSTRATE WITH LEAD PIN
Document Type and Number:
Japanese Patent JP2006066653
Kind Code:
A
Abstract:

To provide a high reliability wiring substrate having lead pin which is capable of preventing the falling-off or the like of a lead pin, while securing a bonding strength between the lead pin and the wiring substrate, even if an oblique external force is applied on the lead pin mounted on the wiring substrate consisting of glass ceramics having a low thermal expansion coefficient.

In the wiring substrate 2 with a lead pin, a wiring conductor 6 is formed on the surface and in an insulating substrate 5 consisting of glass ceramics having the thermal expansion coefficient at 40-400°C of 2.3×10-6/°C to 4.5×10-6/°C and the magnetic strength of 150-250 MPa, while the head 1a of the lead pin 1 is connected to the wiring conductor 6 on the surface of the insulating substrate 5 via a connecting pad 2 consisting of Ag-Cu alloy brazing material including at least one kind of Ti, Zr or Hf. In such a wiring substrate 3 with the lead pin, a stress-relieving layer 6a having a thermal expansion coefficient larger than that of the insulating substrate 5 is formed at a site on the insulating substrate 5, whereat the insulating substrate 5 is superimposed on the outer periphery of the connecting pad 2 in the plan view of the inside thereof.


Inventors:
HORINOUCHI NAOKI
Application Number:
JP2004247523A
Publication Date:
March 09, 2006
Filing Date:
August 26, 2004
Export Citation:
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Assignee:
KYOCERA CORP
International Classes:
H01L23/12; H01L23/13; H05K3/46