PURPOSE: To set the delay time and discharging current of a discharging circuit independently when a word line falls without decreasing the integration degree and yield of an element, by generating an antiphase signal by a transistor (TR) circuit connected to the word line.

CONSTITUTION: The word line W+ is connected to the output of a word line driving circuit WDR at one terminal and to the input of a word line discharging circuit at the other terminal. A holding line W- connects with a holding current source IH and the word line discharging circuit DSC. When the word line W+ falls, i.e. when the TR of the work line driving circuit WD turns off, the potential of the word line W+ starts dropping by the discharging current ID, but even after a TR1 turns off, the base potential of a TR2 is held at a level (L) for a specific time by the RC delay circuit consisting of a resistance R1 and a capacitor C1. Therefore, the TRT2 is also turned on during the period and a discharging TR3 is still turned on. Therefore, charges on the word line W+ are discharged by the TR3 through a memory cell and the holding line W- to cause an abrupt drop to the level (L).