PURPOSE: To avoid the display of the extra zero except the lowest rank digit, by providing the gate circuit which secures the logic product between the highest rank digit signal and the set ouput signal of the FF which is set by the input of the lowest rank digit signal.

CONSTITUTION: The circuit consists of 7-segment decoder 1, D-type FF6 and gate circuit 11 which secures the logic product between the output signal of FF6 and highest rank digit MSD signal 10 each. In the case of MSD, signal 10 is "L", and thus the output of circuit 11 is "L" regardless of the state of FF6. As a result, blanking input signal 4 is supplied to decoder 1. Thus the zero blanking action is given when zero input signal 2 is supplied to input terminals 2aW2d each, and nothing is displayed to MSD. Then in the case of lowest rank digit LSD, signal 10 is "H" and LSD signal S is "L" each. Thus the output of circuit 11 becomes "H", and no signal 4 is given to decoder 1. Accordingly, the necessary and sufficient condition is obtained for the zero blanking although zero signal 2 may be supplied. And zero is displayed at the lowest rank digit.