Title:
Abnormality display device for electronic devices
Document Type and Number:
Japanese Patent JP6299191
Kind Code:
B2
Abstract:
An abnormality display device for an electronic apparatus includes power source circuits (1) each being used inside systems of the electronic apparatus and generating each of system voltages, a voltage monitoring circuit (2) that turns on an input power source of the electronic apparatus and detects whether each system voltage normally rises up before the electronic apparatus rises, display elements (6b to 6d) that show whether an abnormality occurs in any of the system voltages through input of a signal from the voltage monitoring circuit (2), and switching elements (5a to 5c) in which a switching signal is input after each system voltage rises. The switching signal switches the display elements from a display mode used to show the abnormality of each system voltage to a display mode other than the display mode used to show the abnormality of each system voltage.
Inventors:
Masaki Oida
Sonoda Shinpei
Sonoda Shinpei
Application Number:
JP2013252442A
Publication Date:
March 28, 2018
Filing Date:
December 05, 2013
Export Citation:
Assignee:
株式会社リコー
International Classes:
G01D7/00; G06F1/28
Domestic Patent References:
| JP2000188829A | ||||
| JP57106920A | ||||
| JP7028784Y2 |
Attorney, Agent or Firm:
Tamio Nishiwaki