Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
METHOD AND DEVICE FOR POLISHING SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPH0825194
Kind Code:
A
Abstract:

PURPOSE: To suppress a particle level in a surface by performing high speed polishing in a semiconductor wafer, and thereafter continuously performing a low speed polishing process, so as to maintain flatness of the semiconductor wafer surface in a high degree.

CONSTITUTION: A silicon wafer after an etching process is mounted in a platen 12, to use a prescribed polishing agent and liquid, so as to perform polishing by rotating, for instance, the platen 12 and a head 13 both at about 50rpm. Here is high increased a polishing rate in the beginning, to set a polishing margin to 15μm or less, and high speed polishing thereafter, the polishing rate is lowered to perform a low speed polishing process. As a result, high flatness of a wafer surface can be obtained, and also generating a particle due to polishing in this surface can be suppressed.


Inventors:
KAWAMOTO TOSHIRO
OKUTO SUSUMU
TANAKA MASAKI
TAKAISHI KAZUNARI
Application Number:
JP18404594A
Publication Date:
January 30, 1996
Filing Date:
July 12, 1994
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MITSUBISHI MATERIAL SILICON
MITSUBISHI MATERIALS CORP
International Classes:
B24B1/00; H01L21/304; (IPC1-7): B24B1/00; H01L21/304
Attorney, Agent or Firm:
Abe Ituro