Title:
AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JP2023010042
Kind Code:
A
Abstract:
To obtain an amplifier circuit capable of reducing signal distortion.SOLUTION: An amplifier circuit disclosed herein includes: an input circuit that can generate a differential current including a first current and a second current on the basis of an input signal; a first loop filter including a first pre-integration circuit that can perform an integration operation on the basis of the first current and a current corresponding to a first output signal, a first inverter circuit, and a first post-integration circuit to which an output signal of the first inverter circuit and the first output signal are input, and which can generate a first signal by performing the integration operation; a first modulation circuit; a first output circuit; a second loop filter including a second pre-integration circuit to which the second current and a current corresponding to a second output signal are input, and which can perform the integration operation, a second inverter circuit, and a second post-integration circuit that can generate a second signal by performing the integration operation on the basis of the output signal of the second inverter circuit and the second output signal; a second modulation circuit; and a second output circuit.SELECTED DRAWING: Figure 1
Inventors:
NAKAMOTO EIICHI
Application Number:
JP2021113811A
Publication Date:
January 20, 2023
Filing Date:
July 08, 2021
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP
International Classes:
H03F3/217; H03F1/34
Attorney, Agent or Firm:
Patent Attorney Corporation Tsubasa International Patent Office