Title:
増幅器
Document Type and Number:
Japanese Patent JP7187904
Kind Code:
B2
Abstract:
To accurately correct an offset from a low input voltage range to a high input voltage range.SOLUTION: An amplifier 1 includes a first differential input stage 2 having transistors Q1 and Q2 which are P-channel MOSFETs, and a second differential input stage 3 having transistors Q3 and Q4 which are N-channel MOSFETs. The amplifier 1 includes a first correction circuit 11 that flows a correction current to the first differential input stage 2, a second correction circuit 12 that flows a correction current to the second differential input stage 3, and a switching circuit 13. The switching circuit 13 switches the first correction circuit 11 and the second correction circuit 12 according to an input voltage VINP supplied to the first differential input stage 2 and the second differential input stage 3 in either an operation state or a non-operation state.SELECTED DRAWING: Figure 1
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Inventors:
Junichi Yoshida
Application Number:
JP2018166828A
Publication Date:
December 13, 2022
Filing Date:
September 06, 2018
Export Citation:
Assignee:
株式会社デンソー
International Classes:
H03F3/45; H03F3/34
Domestic Patent References:
JP8204468A | ||||
JP2014204291A | ||||
JP2001339257A | ||||
JP11506596A | ||||
JP4196608A | ||||
JP2007527138A | ||||
JP2006352345A | ||||
JP2006508561A | ||||
JP2010258949A |
Attorney, Agent or Firm:
Patent Attorney Corporation Sato