Title:
制御信号発生回路およびそれを用いた半導体装置
Document Type and Number:
Japanese Patent JP5386026
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a control signal generating circuit suitable for controlling a semiconductor device.SOLUTION: A Johnson counter 31 includes flip-flops FF1-FF4 and gate circuits 41-44. It changes control signals C1-C4 to an "H" level in response to start signals ST1-ST4 that are sequentially inputted, and then, the control signals C1-C4 are changed to an "L" level in response to stop signals SP1-SP4 that are sequentially inputted. Thus, without using many flip-flops, the control signals C1-C4 are sequentially changed to the "H" level and the "L" level with a desired time interval.
Inventors:
Hidenori Mitani
Takashi Ito
Takashi Ito
Application Number:
JP2012210743A
Publication Date:
January 15, 2014
Filing Date:
September 25, 2012
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H03K23/54; G11C16/06; H03K17/22; H03K19/00
Domestic Patent References:
| JP2005108397A | ||||
| JP11249972A | ||||
| JP2008510428A | ||||
| JP2003289245A |
Foreign References:
| US5425074 |
Attorney, Agent or Firm:
Fukami patent office