Title:
A data processing device and a decoding disposal method
Document Type and Number:
Japanese Patent JP6262085
Kind Code:
B2
Abstract:
A modulo exponentiation operation is expressed as Y=XdmodN. The modulo exponentiation operation is performed to yield C0=Xd′modN, C1=XdmodN, and T=X2^nmodN, where d′ denotes two's complement of d and n denotes the number of bits in d. The modulo exponentiation operation determines whether or not a remainder resulting from the product of a value of C0 and a value of C1 modulo N matches a value of T. The modulo exponentiation operation assigns the value of C1 to Y if a match is found. The modulo exponentiation operation reports an error if a match is not found. The modulo exponentiation operation applies an RSA decryption process to a modulo exponentiation operation using the Chinese remainder theorem.
Inventors:
Kazuhiko Fukushima
Kiyotakero Nagano
Kiyotakero Nagano
Application Number:
JP2014130199A
Publication Date:
January 17, 2018
Filing Date:
June 25, 2014
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H04L9/30; G09C1/00
Domestic Patent References:
| JP2009532973A | ||||
| JP2000509521A | ||||
| JP11008616A | ||||
| JP2002229445A | ||||
| JP2003502905A |
Foreign References:
| WO2008114310A1 | ||||
| US20090034717 |
Attorney, Agent or Firm:
Ken Ieiri
Shizuyo Tamamura
Shizuyo Tamamura