To generate a clock signal having accurate frequency, even if a CR oscillation circuit is subjected to temperature change or aging change.
An A/D conversion value indicating the temperature of a CR oscillator 12 and a multiplier setting value FMULR determining a multiplier of a CR oscillation circuit 8 are stored correspondingly in an EEPROM 3, The multiplier setting value FMULR corresponding to the A/D conversion value (detection temperature T) is read out and set to a register of the CR oscillation circuit 8. Each time a communication circuit 7 receives a synchronization signal, a clock signal CLK is counted to measure a unit bit length; the multiplier setting value FMULR is corrected based on a count value XA of the clock signals and a reference count value XB, based on a reference cycle with respect to a regular unit bit time; and the corrected multiplier setting value FMULR is written in the EEPROM 3 corresponding to the detection temperature T.
COPYRIGHT: (C)2009,JPO&INPIT
Toshihiko Matsuoka
Hideaki Ishihara
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