Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JP3179211
Kind Code:
B2
Abstract:
PURPOSE: To prevent deterioration of interelement matching of a plurality of elements arranged in a function block, and enable reducing of the wiring regions of power supply wiring and earth wiring which connect a plurality of the function blocks.
CONSTITUTION: In a semiconductor integrated circuit device wherein power supply wiring VCC and earth wiring GND are arranged on both side parts of a function block 1, and elements Q1-Q6 and R1-R4 are connected with the power supply wiring and the earth wiring through element wiring 2, each of the power supply wiring and the earth wiring is formed in a line type with arbitrary width, and the element wiring which connects elements in the function block is connected with the power supply wiring and the earth wiring, at one point of each wiring.
Inventors:
Masami Kishimoto
Application Number:
JP28344092A
Publication Date:
June 25, 2001
Filing Date:
September 30, 1992
Export Citation:
Assignee:
NEC IC Microcomputer System Co., Ltd.
International Classes:
H01L21/82; H01L21/3205; H01L23/52; (IPC1-7): H01L21/3205
Domestic Patent References:
| JP5812432A | ||||
| JP2309720A | ||||
| JP6412594A |
Attorney, Agent or Firm:
Suzuki Akio