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Title:
【発明の名称】半導体集積回路
Document Type and Number:
Japanese Patent JP3057814
Kind Code:
B2
Abstract:
A semiconductor integrated circuit includes a sequential circuit including a plurality of flip-flops which latch and keep data supplied to an input terminal at a prescribed timing and which perform prescribed sequential treatments of the input data, and a combinational circuit implemented at the input and/or output terminals of the sequential circuit and which performs a prescribed combinational treatment or treatments of the input and/or output data to and/or from the sequential circuit. The semiconductor integrated circuit also includes a data-through circuit operated by an external control signal configured to transfer the data supplied to the input terminal direct to an output terminal of a prescribed flip-flop of the plurality flip-flops constituting the sequential circuit.

Inventors:
Fumihiko Sato
Application Number:
JP15366091A
Publication Date:
July 04, 2000
Filing Date:
June 26, 1991
Export Citation:
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Assignee:
NEC
International Classes:
G01R31/3185; G06F11/22; G01R31/28; H03K3/037; (IPC1-7): G01R31/28
Domestic Patent References:
JP63222275A
JP3111776A
JP274881A
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)