Title:
A grinding method of a silicon wafer
Document Type and Number:
Japanese Patent JP6206388
Kind Code:
B2
Abstract:
The present invention is method for polishing silicon wafer, the method including recovering used slurry containing polishing abrasive grains that have been supplied to the silicon wafer and used for polishing, and circulating and supplying the recovered used slurry to the silicon wafer to polish the silicon wafer, wherein mixed alkali solution containing chelating agent and either or both of a pH adjuster and a polishing rate accelerator is added to the recovered used slurry without adding unused polishing abrasive grains, and the recovered used slurry is circulated and supplied to the silicon wafer to polish the silicon wafer. As a result, there is provided a method for polishing a silicon wafer that can suppress the occurrence of metal impurity contamination and stabilize the composition (e.g., the concentration of the chelating agent) of the used slurry when the used slurry is circulated and supplied to the silicon wafer for polishing.
Inventors:
Sasaki Honest
Hiromasa Hashimoto
Fujiyama Kei
Hiromasa Hashimoto
Fujiyama Kei
Application Number:
JP2014253069A
Publication Date:
October 04, 2017
Filing Date:
December 15, 2014
Export Citation:
Assignee:
Shin-Etsu Semiconductor Co., Ltd.
International Classes:
H01L21/304; B24B57/02
Domestic Patent References:
| JP200954629A | ||||
| JP2009255203A | ||||
| JP2000288935A |
Attorney, Agent or Firm:
Mikio Yoshimiya