Title:
The guest operating system which supports virtualization using a memory protection unit
Document Type and Number:
Japanese Patent JP6106765
Kind Code:
B2
Abstract:
A processor is provided with a first memory protection unit applying a first set of permissions and a second memory protection unit applying a second set of permissions. A memory access will only be permitted if both the first set of permissions and the second set of permissions are satisfied. The processor also includes a memory management unit which serves to translate from virtual addresses VA to physical addresses PA. A selectable one of the first memory protection unit and the memory management unit is active at any given time under control of a selection bit set by a hypervisor program executing at an exception level with higher privilege than the exception level at which the guest operating systems execute.
Inventors:
Grizenthwaite, Richard, Roy
Clark, Simon, John
Goodacre, Anthony, John
Clark, Simon, John
Goodacre, Anthony, John
Application Number:
JP2015555783A
Publication Date:
April 05, 2017
Filing Date:
February 05, 2013
Export Citation:
Assignee:
RM Limited
International Classes:
G06F12/14; G06F9/46; G06F12/10
Domestic Patent References:
| JP2002535777A | ||||
| JP2006506751A | ||||
| JP2003521776A |
Foreign References:
| WO2011101660A2 | ||||
| US20020069341 |
Other References:
中森 章,定番ARM7から最新Cortexまで ARMプロセッサ・ボードの設計と開発 第6章,Interface,日本,CQ出版株式会社,2008年11月 1日,第34巻 第11号,p.105-121
茂田井 寛隆 ほか,組込み向けCPU仮想化技術対応ハイパーバイザの設計,組込みシステムシンポジウム 2012 (ESS 2012),日本,情報処理学会,2012年10月10日,p.95-100
茂田井 寛隆 ほか,組込み向けCPU仮想化技術対応ハイパーバイザの設計,組込みシステムシンポジウム 2012 (ESS 2012),日本,情報処理学会,2012年10月10日,p.95-100
Attorney, Agent or Firm:
Asamura patent office
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