Title:
An information processor, an information processing program
Document Type and Number:
Japanese Patent JP6067449
Kind Code:
B2
Abstract:
According to an embodiment, a device includes a processor unit, a control unit, a setting unit, a writing unit, and an executing unit. The processor unit is configured to switch between secure and non-secure modes, read/write data from/to a memory unit, and write an OS execution image of a secure OS unit to the memory unit. The setting unit is configured to set a shared memory area allowing reading and writing in both modes and an execution module memory area allowing reading and writing in the secure mode but not allowing reading or writing in the non-secure mode with respect to the control unit. The writing unit is configured to write an execution module to be executed in the secure OS unit to the shared memory area. The executing unit is configured to execute the execution module that has been written to the execution module memory area.
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Inventors:
Hiroshi Isozaki
Kanai Zun
Kanai Zun
Application Number:
JP2013065227A
Publication Date:
January 25, 2017
Filing Date:
March 26, 2013
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06F21/12; G06F21/57
Domestic Patent References:
| JP2006506751A | ||||
| JP2009282751A |
Foreign References:
| WO2007125911A1 | ||||
| US20040153672 | ||||
| US20090307783 | ||||
| US20080196081 |
Other References:
中嶋 健一郎 Kenichiro Nakajima,セキュリティ支援ハードウェアによるハイブリッドOSシステムの高信頼化 Enhancing reliability in Hybrid OS system with security hardware,情報処理学会研究報告 Vol.2008 No.116 IPSJ SIG Technical Reports,日本,社団法人情報処理学会 Information Processing Society of Japan,2008年11月20日,第2008巻,pp.1-7
Attorney, Agent or Firm:
Sakai International Patent Office