Title:
An integrated circuit and an operation method for the same
Document Type and Number:
Japanese Patent JP5976392
Kind Code:
B2
Abstract:
An apparatus including an ultrasonic motor having an electrostrictive element of a stator for driving a rotor thereof; and a microcontroller having a central processing unit (CPU), a built-in memory (ROM) and a pulse generating circuit which generates an pulse output signal which is applied to the electrostrictive element of the ultrasonic motor, wherein the pulse generating circuit comprising a rise setting register, a fall setting register, a phase adjustment data register, a cycle data register, a phase arithmetic circuit, a counter, a 1st comparator, a 2nd comparator, and a pulse generator, wherein the counter starts to count up, incrementing its count value from a count initial value, wherein the cycle data register stores, as cycle data, a count maximum value for the counter to count up to it.
Inventors:
Ken Shimizu
Toshio Asai
Toshio Asai
Application Number:
JP2012112468A
Publication Date:
August 23, 2016
Filing Date:
May 16, 2012
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H02N2/06; H02N2/14
Domestic Patent References:
| JP9294384A | ||||
| JP6168048A | ||||
| JP2005151673A | ||||
| JP2010004680A |
Attorney, Agent or Firm:
Shizuyo Tamamura