Title:
インバータ装置
Document Type and Number:
Japanese Patent JP7394619
Kind Code:
B2
Abstract:
To provide an inverter device capable of effectively eliminating or suppressing generation of common mode noise due to an inversion of a phase current even when influence of dead time and delay time of a switching element is taken into consideration.SOLUTION: A control device 21 synchronizes switching timings of upper and lower arm switching elements 18A to 18F of each phase taking dead time and delay time of the switching elements into consideration, and performs a switching operation that cancels change in a phase voltage applied to a motor 8 with change in other phase voltages. In a carrier period in which a direction of a current flowing through the motor 8 is reversed, the switching operation is changed so as to eliminate or suppress fluctuation of a neutral point potential of the motor 8 caused by the dead time and the delay time of the switching elements.SELECTED DRAWING: Figure 1
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Inventors:
Tatsuki Kashihara
Application Number:
JP2019236377A
Publication Date:
December 08, 2023
Filing Date:
December 26, 2019
Export Citation:
Assignee:
Sanden Corporation
International Classes:
H02M7/48
Domestic Patent References:
| JP2016208664A | ||||
| JP10023760A |
Foreign References:
| WO2014073247A1 | ||||
| US20160372927 |
Attorney, Agent or Firm:
Takashi Amagasa