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Title:
A light leveling control circuit that controls the light leveling of the target module and a light leveling control method that follows it.
Document Type and Number:
Japanese Patent JP6366514
Kind Code:
B2
Abstract:
A write leveling control method which includes registering data-related signal (DRS) reference delay values corresponding to types of memory modules in a leveling reference table; transmitting write leveling-related signals to a first type of memory module mounted on a target board; detecting timing skews between a clock signal and data-related signals received from memory devices on the mounted memory module; and adjusting a delay of a data-related signal transmitted to a memory device of the mounted memory module if a corresponding timing skew is outside of a first range, based on the DRS reference delay value corresponding to the mounted memory module.

Inventors:
Kang Ken Shun
Gold heaven
Shrine
Application Number:
JP2015009952A
Publication Date:
August 01, 2018
Filing Date:
January 22, 2015
Export Citation:
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Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
G06F12/00; G06F12/06
Domestic Patent References:
JP2013196574A
JP201354692A
JP2011508311A
JP2004192074A
JP2004178759A
Attorney, Agent or Firm:
Kyosei International Patent Office



 
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