Title:
A manufacturing method of a device, and a manufacturing method of EL module
Document Type and Number:
Japanese Patent JP6017594
Kind Code:
B2
Abstract:
An object is to suppress discharge due to static electricity generated by peeling, when an element formation layer including a semiconductor element is peeled from a substrate. Over the substrate, the release layer and the element formation layer are formed. The support base material which can be peeled later is fixed to the upper surface of the element formation layer. The element formation layer is transformed through the support base material, and peeling is generated at an interface between the element formation layer and the release layer. Peeling is performed while the liquid is being supplied so that the element formation layer and the release layer which appear sequentially by peeling are wetted with the liquid such as pure water. Electric charge generated on the surfaces of the element formation layer and the release layer can be diffused by the liquid, and discharge by peeling electrification can be eliminated.
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Inventors:
Shingo Eguchi
Youma
Atsuhiro Tani
Hirosue Misako
Kenichi Hashimoto
Yasushi Hosaka
Youma
Atsuhiro Tani
Hirosue Misako
Kenichi Hashimoto
Yasushi Hosaka
Application Number:
JP2015006304A
Publication Date:
November 02, 2016
Filing Date:
January 16, 2015
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
H01L21/02; G02F1/1368; H01L27/12; H01L51/50; H05B33/10; H05B33/14
Domestic Patent References:
| JP2006186347A | ||||
| JP2003174153A | ||||
| JP2001352048A | ||||
| JP2003526900A | ||||
| JP2005079553A | ||||
| JP2006135305A | ||||
| JP5378097B2 | ||||
| JP5355202B2 | ||||
| JP5297871B2 | ||||
| JP2004310051A |
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