Title:
A manufacturing method of a semiconductor device and a semiconductor device
Document Type and Number:
Japanese Patent JP6009139
Kind Code:
B2
Abstract:
The semiconductor device includes a first-conductivity-type region (an N-type well region, for example) and a first second-conductivity-type region (a P-type semiconductor substrate, for example) positioned to cover a lower surface of the first-conductivity-type region, a second second-conductivity-type region (a P-type well region, for example) that is positioned to surround the side faces of the first-conductivity-type region and is in contact with the first second-conductivity-type region, a guard ring that is electrically connected to the second second-conductivity-type region and is also electrically connected to a fixed potential terminal, an insulating film positioned to cover an upper surface of the first-conductivity-type region, and an analog element (a resistor element, for example) placed on the insulating film.
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Inventors:
Hiroaki Namba
Application Number:
JP2010141336A
Publication Date:
October 19, 2016
Filing Date:
June 22, 2010
Export Citation:
Assignee:
Renesas Electronics Corporation
International Classes:
H01L21/822; H01L27/04
Domestic Patent References:
| JP2009295867A | ||||
| JP2009064974A | ||||
| JP2000150798A | ||||
| JP2008053257A | ||||
| JP61194740A |
Attorney, Agent or Firm:
Shinji Hayami
Satoshi Amagi
Satoshi Amagi