Title:
温度較正の方法および構成
Document Type and Number:
Japanese Patent JP2007527990
Kind Code:
A
Abstract:
The invention concerns an arrangement on a semiconductor chip for calibrating temperature setting curve having a signal generation unit (2) for providing a first signal (Iptat1, Vptat1, fptat1), which is proportional to the actual uncalibrated temperature T1 of the chip. To avoid bringing the chip on a second temperature it is proposed to read a first signal (Iptat1, Vptat1, fptat1), which is proportional to the actual uncalibrated temperature T1 of the chip and generate a signal offset (Ivirt, Vvirt, fvirt), which is combined with the first signal (Iptat1, Vptat1, fptat1) defining a second signal (Iptat2, Vptat2, fptat2) and to extract a first actual temperature T1 from the first signal (Iptat1, Vptat1, fptat1) and a second uncalibrated temperature T2 from the second signal (Iptat2, Vptat2, fptat2).
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Inventors:
Sasha and Romia
Patrick, El Hafen
Patrick, El Hafen
Application Number:
JP2006516733A
Publication Date:
October 04, 2007
Filing Date:
June 22, 2004
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G01K7/01; G01K15/00
Domestic Patent References:
| JPH0979916A | 1997-03-28 | |||
| JPS6341013B2 | 1988-08-15 | |||
| JP2001116630A | 2001-04-27 | |||
| JPH09297070A | 1997-11-18 | |||
| JPH07198412A | 1995-08-01 |
Foreign References:
| US6183131B1 | 2001-02-06 | |||
| US20020173930A1 | 2002-11-21 |
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki