Title:
PLL半導体装置並びにその試験の方法及び装置
Document Type and Number:
Japanese Patent JP4771572
Kind Code:
B2
Abstract:
On a semiconductor device 20, fabricated are a VCO 10A, an frequency divider by integer R 21, a frequency divider by integer (PxN+A) 22 wherein each of P, N and A is an integer, A is variable and A
Inventors:
Nirazuka public interest
Application Number:
JP2000113200A
Publication Date:
September 14, 2011
Filing Date:
April 10, 2000
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
G01R31/316; G01R31/30; H03L7/00; H03L7/08; G01R25/00
Domestic Patent References:
| JP98652A | ||||
| JP572244A | ||||
| JP1117536A | ||||
| JP1065526A | ||||
| JP1065525A | ||||
| JP11264857A |
Attorney, Agent or Firm:
Shinkichi Matsumoto